Multiplierless approximate 4‐point DCT VLSI architectures for transform block coding
نویسندگان
چکیده
منابع مشابه
Multiplierless Approximate 4-point DCT VLSI Architectures for Transform Block Coding
Two multiplierless algorithms are proposed for 4×4 approximate-DCT for transform coding in digital video. Computational architectures for 1-D/2-D realisations are implemented using Xilinx FPGA devices. CMOS synthesis at the 45 nm node indicate real-time operation at 1 GHz yielding 4×4 block rates of 125 MHz at less than 120 mW of dynamic power consumption.
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ژورنال
عنوان ژورنال: Electronics Letters
سال: 2013
ISSN: 0013-5194,1350-911X
DOI: 10.1049/el.2013.1352